SanDisk

brand of flash memory products of Western Digital

DBpedia resource is: http://dbpedia.org/resource/SanDisk

Abstract is: SanDisk is a brand for flash memory products, including memory cards and readers, USB flash drives, solid-state drives, and digital audio players, manufactured and marketed by Western Digital. The original company, SanDisk Corporation was acquired by Western Digital in 2016. As of March 2019, Western Digital was the fourth-largest manufacturer of flash memory having declined from third-largest in 2014.

Wikimedia Commons category is SanDisk

SanDisk is …
instance of (P31):
public companyQ891723
enterpriseQ6881511
businessQ4830453

External links are
P5531Central Index Key0001000180
P3225Corporate Number (Japan)5700150071996
P2088Crunchbase organization IDmusicgremlin
sandisk
sandisk-ventures
P2013Facebook usernamesandisk
P646Freebase ID/m/039m_g
P2003Instagram usernamesandisk
P946ISINUS80004C1018
P213ISNI0000000449102585
P1278Legal Entity Identifier5493009Q58RSNRUOV288
P4776MAC Address Block Large ID001B44
001E82
P6366Microsoft Academic ID177486454
P12597museum-digital person ID251657
P966MusicBrainz label ID0f69a575-55fe-4308-8590-96129a567b66
P8885Namuwiki ID샌디스크
P856official websitehttps://www.westerndigital.com/brand/sandisk
P3347PermID4295907857
P3500Ringgold ID439274
P11892Threads usernamesandisk
P2002X usernameSanDisk
P2397YouTube channel IDUCqXoT2w9gl8YNC6JM7t_Xng

P1661Alexa rank10610
P17countryUnited States of AmericaQ30
P159headquarters locationMilpitasQ927510
P571inception1988-01-01
P452industryrecording mediumQ193395
P1454legal formpublic companyQ891723
P463member ofWi-Fi AllianceQ1361045
SD AssociationQ7389502
P127owned byWestern DigitalQ738770
P749parent organizationWestern DigitalQ738770
P1056product or material produced or service provideddynamic random-access memoryQ189396
memory cardQ183731
SIM cardQ230110
solid-state driveQ487343
USB flash driveQ1647694
computer memoryQ5830907
portable media playerQ10872571
P8687social media followers25100
128566
P414stock exchangeNasdaqQ82059
P910topic's main categoryCategory:SanDiskQ20930782

Wikimedia Commons Images

P18: image


FileName: WDC office (Milpitas, CA).jpg

Description: Former San Disk headquarters building shot. This is now a Western Digital office as you can see by current signage. (photo taken Oct. 31, 2018)

Artist: AnneElizH

Work is copyrighted.
License: CC BY-SA 4.0
Attribution is required.

Reverse relations

owned by (P127)
Q123254611Antiferroelectric memory devices and methods of making the same
Q123254878Antiferroelectric memory devices and methods of making the same
Q123255854Apparatus and methods for configurable bit line isolation in non-volatile memory
Q123254747Application based verify level offsets for non-volatile memory
Q123254911Bi-directional sensing in a memory
Q123254452Binary weighted voltage encoding scheme for supporting multi-bit input precision
Q123255051Block quality classification at testing for non-volatile memory, and multiple bad block flags for product diversity
Q123254447Block-dependent cell source bounce impact reduction in non-volatile memory
Q123255700Bonded assembly containing laterally bonded bonding pads and methods of forming the same
Q123255831Bonded assembly containing metal-organic framework bonding dielectric and methods of forming the same
Q123255878Bonded assembly containing oxidation barriers and/or adhesion enhancers and methods of forming the same
Q123254467Bonded assembly containing oxidation barriers, hybrid bonding, or air gap, and methods of forming the same
Q123255066Bonded assembly containing oxidation barriers, hybrid bonding, or air gap, and methods of forming the same
Q123254902Bonded assembly formed by hybrid wafer bonding using selectively deposited metal liners
Q123255217Bonded assembly of semiconductor dies containing pad level across-die metal wiring and method of forming the same
Q123255749Bonded assembly with vertical power and control signal connection adjacent to sense amplifier regions and methods of forming the same
Q123255136Bonded die assembly containing a manganese-containing oxide bonding layer and methods for making the same
Q123254497Bonded three-dimensional memory devices and methods of making the same by replacing carrier substrate with source layer
Q123255164Bonded three-dimensional memory devices and methods of making the same by replacing carrier substrate with source layer
Q123255783Bonded three-dimensional memory devices and methods of making the same by replacing carrier substrate with source layer
Q123255790Bonded three-dimensional memory devices and methods of making the same by replacing carrier substrate with source layer
Q123255792Bonded three-dimensional memory devices and methods of making the same by replacing carrier substrate with source layer
Q123255584Bonding pads including interfacial electromigration barrier layers and methods of making the same
Q123255706Boosting read scheme with back-gate bias
Q123255238Buried source line structure for boosting read scheme
Q123254659Calibration for integrated memory assembly
Q123255091Centralized fixed rate serializer and deserializer for bad column management in non-volatile memory
Q123255119Circuit for detecting pin-to-pin leaks of an integrated circuit package
Q123255864Circuits and methods for reliable replacement of bad columns in a memory device
Q123255187Column redundancy data architecture for yield improvement
Q123255047Command interface and pre-fetch architecture
Q123254721Concurrent multi-bit access in cross-point array
Q123255234Concurrent programming of multiple cells for non-volatile memory devices
Q123255866Content addressable memory with spin-orbit torque devices
Q123254918Controlling timing and ramp rate of program-inhibit voltage signal during programming to optimize peak current
Q123255767Controlling word line voltages to reduce read disturb in a memory device
Q123255592Countermeasure for reducing peak current during program operation under first read condition
Q123255139Countermeasure for reducing peak current during programming by optimizing timing of latch scan operations
Q123254843Countermeasures for periodic over programming for non-volatile memory
Q123255835Cross-bar arrays having steering element with diode
Q123255846Cross-point array of ferroelectric field effect transistors and method of making the same
Q123254489Cutoff gate electrodes for switches for a three-dimensional memory device and method of making the same
Q123255755Detection of a last programming loop for system performance gain
Q123255802Double write/read throughput by CMOS adjacent array (CaA) NAND memory
Q123255667Dynamic bit line voltage and sensing time enhanced read for data recovery
Q123254734Dynamic re-evaluation of parameters for non-volatile memory using microcontroller
Q123255099Dynamic staggering for programming in nonvolatile memory
Q123255382Dynamic tier selection for program verify in nonvolatile memory
Q123254745ECC in integrated memory assembly
Q123255571Embedded bonded assembly and method for making the same
Q123255379Enhanced multistate verify techniques in a memory device
Q123255248Erase operation for memory device with staircase word line voltage during erase pulse
Q123254876Erase tail comparator scheme
Q123255703Fast bus inversion for non-volatile memory
Q123255811Ferroelectric memory devices containing a two-dimensional charge carrier gas channel and methods of making the same
Q123255579Ferroelectric memory devices employing conductivity modulation of a thin semiconductor material or a two-dimensional charge carrier gas and methods of
Q123255243Ferroelectric memory devices with dual dielectric confinement and methods of forming the same
Q123255111Fluorine-free tungsten deposition process employing in-situ oxidation and apparatuses for effecting the same
Q123255031Forced current access with voltage clamping in cross-point array
Q123255356Gate material-based capacitor and resistor structures and methods of forming the same
Q123255650Hard and soft bit data from single read
Q123254811High voltage field effect transistor with vertical current paths and method of making the same
Q123255759High-level output voltage training for non-volatile memory
Q123255744Hole pre-charge scheme using gate induced drain leakage generation
Q123255148In-storage logic for hardware accelerators
Q123255010Input/output circuit internal loopback
Q123255199Interfacial tilt-resistant bonded assembly and methods for forming the same
Q123255174Leakage reduction circuit for read-only memory (ROM) structures
Q123254940Level shifter with improved negative voltage capability
Q123255240Level shifter with improved negative voltage capability
Q123255027Lockout mode for reverse order read operation
Q123255227Look neighbor ahead for data recovery
Q123255757Loop dependent plane skew methodology for program operation
Q123255663Loop-dependent switching between program-verify techniques
Q123255730MRAM cross-point memory with reversed MRAM element vertical orientation
Q123254925Magnetic tunnel junction memory devices employing resonant tunneling and methods of manufacturing the same
Q123254926Magnetic tunnel junction memory devices employing resonant tunneling and methods of manufacturing the same
Q123255192Magnetic tunnel junction memory devices employing resonant tunneling and methods of manufacturing the same
Q123254802Managed fetching and execution of commands from submission queues
Q123254444Memory apparatus and method of operation using negative kick clamp for fast read
Q123255224Memory apparatus and method of operation using one pulse smart verify
Q123255088Memory apparatus and method of operation using plane dependent ramp rate and timing control for program operation
Q123254439Memory apparatus and method of operation using state bit-scan dependent ramp rate for peak current reduction during program operation
Q123254910Memory apparatus and method of operation using triple string concurrent programming during erase
Q123255153Memory block with separately driven source regions to improve performance
Q123255014Memory cell mis-shape mitigation
Q123255576Memory device containing dual etch stop layers for selector elements and method of making the same
Q123254794Memory device using a multilayer ferroelectric stack and method of forming the same
Q123255897Memory device with temporary kickdown of source voltage before sensing
Q123254914Memory die with source side of three-dimensional memory array bonded to logic die and methods of making the same
Q123255130Memory die with source side of three-dimensional memory array bonded to logic die and methods of making the same
Q123254798Memory programming with selectively skipped bitscans and fewer verify pulses for performance improvement
Q125461884Memory scaling semiconductor device
Q125462694Memory-efficient block/object address mapping
Q123254789Method and apparatus for depositing a multi-sector film on backside of a semiconductor wafer
Q123255004Methods for reusing substrates during manufacture of a bonded assembly including a logic die and a memory die
Q123255268Microcontroller architecture for non-volatile memory
Q123255487Microcontroller architecture for non-volatile memory
Q123254781Modified verify in a memory device
Q123255682Modified verify scheme for programming a memory apparatus
Q123255497Multi-layer barrier for CMOS under array type memory device and method of making thereof
Q123254809Multi-level program pulse for programming single level memory cells to reduce damage
Q123255525Multi-level ultra-low power inference engine accelerator
Q123254454Multi-resistance MRAM
Q123254633Multi-tier three-dimensional memory device with dielectric support pillars and methods for making the same
Q123254654Multi-tier three-dimensional memory device with nested contact via structures and methods for forming the same
Q123254814Multibit ferroelectric memory cells and methods for forming the same
Q123254786Negative bit line biasing during quick pass write programming
Q123255890Neighbor word line compensation full sequence program scheme
Q123255886Neighboring or logical minus word line dependent verify with sense time in programming of non-volatile memory
Q123254945Non-volatile memory array leakage detection
Q123254562Non-volatile memory with capacitors using metal under signal line or above a device capacitor
Q123254856Non-volatile memory with capacitors using metal under signal line or above a device capacitor
Q123254905Non-volatile memory with different use of metal lines in word line hook up regions
Q123254648Non-volatile memory with erase verify skip
Q123254769Non-volatile memory with memory array between circuits
Q123254963Non-volatile memory with multiple wells for word line switch transistors
Q123255232Non-volatile memory with switchable erase methods
Q126181081Non-volatile semiconductor memory device adapted to store a multi-valued data in a single memory cell
Q123254782Nonvolatile memory with efficient look-ahead read
Q123255184One selector one resistor RAM threshold voltage drift and offset voltage compensation methods
Q123254787Optimized programming with a single bit per memory cell and multiple bits per memory cell
Q123255798Peak and average current reduction for sub block memory operation
Q123255709Peak power reduction management in non-volatile storage by delaying start times operations
Q123254757Per pin Vref for data receivers in non-volatile memory system
Q123254598Periodic write to improve data retention
Q123255765Physical unclonable function (PUF) for NAND operator
Q123255660Positive feedback and parallel searching enhanced optimal read method for non-volatile memory
Q123254624Power off recovery in cross-point memory with threshold switching selectors
Q123255103Pre-charge technique for improved charge pump efficiency
Q123254600Pre-computation of memory core control signals
Q123254477Program tail plane comparator for non-volatile memory structures
Q123255824Programming memory cells using encoded TLC-fine
Q123255480Programming techniques including an all string verify mode for single-level cells of a memory device
Q123254932Programming techniques with fewer verify pulses to improve performance
Q123254616Read operation or word line voltage refresh operation in memory device with reduced peak current
Q123254950Read refresh to improve power on data retention for a non-volatile memory
Q123255352Realization of binary neural networks in NAND memory arrays
Q123255838Realization of neural networks with ternary inputs and binary weights in NAND memory arrays
Q123254784Reduced program time for memory cells using negative bit line voltage for enhanced step up of program bias
Q123255313Reduced verify scheme during programming based on spacing between verify levels
Q123255893Reducing post-read disturb in a nonvolatile memory device
Q123255721Reference current generator control scheme for sense amplifier in NAND design
Q123255607Refresh operations for memory cells based on susceptibility to read errors
Q123254806Reverse VT-state operation and optimized BiCS device structure
Q123254937Scalable search system design with single level cell NAND-based binary and ternary valued content addressable memory cells
Q123255084Semiconductor device containing bit lines separated by air gaps and methods for forming the same
Q123255506Semiconductor device containing metal-organic framework inter-line insulator structures and methods of manufacturing the same
Q123255390Semiconductor device containing tubular liner spacer for lateral confinement of self-aligned silicide portions and methods of forming the same
Q125464334Semiconductor device including fractured semiconductor dies
Q125464702Semiconductor device including fractured semiconductor dies
Q123254886Semiconductor device including having metal organic framework interlayer dielectric layer between metal lines and methods of forming the same
Q123255368Semiconductor die containing dummy metallic pads and methods of forming the same
Q123254882Semiconductor die containing silicon nitride stress compensating regions and method for making the same
Q123254841Semiconductor die including diffusion barrier layers embedding bonding pads and methods of forming the same
Q123254853Semiconductor die including diffusion barrier layers embedding bonding pads and methods of forming the same
Q123254473Semiconductor die including edge ring structures and methods for making the same
Q123255212Semiconductor die including edge ring structures and methods for making the same
Q123255520Semiconductor die including edge ring structures and methods for making the same
Q123255771Semiconductor structure containing reentrant shaped bonding pads and methods of forming the same
Q123255874Semiconductor structure containing reentrant shaped bonding pads and methods of forming the same
Q123255096Signal amplification in MRAM during reading, including a pair of complementary transistors connected to an array line
Q123255349Signal preserve in MRAM during reading
Q123255178Smart erase scheme
Q123255895Source line voltage control for NAND memory
Q123254848Spacerless source contact layer replacement process and three-dimensional memory device formed by the process
Q123255208Spacerless source contact layer replacement process and three-dimensional memory device formed by the process
Q123254770Spark gap electrostatic discharge (ESD) protection for memory cards
Q123255087Spin coating process and apparatus with ultrasonic viscosity control
Q123255386Spin transfer torque MRAM with a spin torque oscillator stack and methods of making the same
Q123254772Spin-transfer torque MRAM with a negative magnetic anisotropy assist layer and methods of operating the same
Q123255245Stacked die assembly including double-sided inter-die bonding connections and methods of forming the same
Q123255434Stacked die assembly including double-sided inter-die bonding connections and methods of forming the same
Q123255006Storage medium-assisted system interface training scheme
Q123255754Storage system with multiple components and method for use therewith
Q123255858Storage systems with go to sleep adaption
Q123254980Sub-block size reduction for 3D non-volatile memory
Q123255599System idle time reduction methods and apparatus
Q123254738Systems and methods for defining memory sub-blocks
Q123255144Systems and methods for dual-pulse programming
Q123255677Systems and methods for program verification on a memory system
Q123255805Systems, methods, and interfaces for vector input/output operations
Q123255106Three dimensional ferroelectric memory
Q123254469Three dimensional semiconductor device containing composite contact via structures and methods of making the same
Q123254804Three-dimensional NAND memory device containing two terminal selector and methods of using and making thereof
Q123255653Three-dimensional NOR array including active region pillars and method of making the same
Q123255411Three-dimensional NOR-type memory device and method of making the same
Q123255562Three-dimensional device with bonded structures including a support die and methods of making the same
Q123255797Three-dimensional memory array including self-aligned dielectric pillar structures and methods of making the same
Q123254620Three-dimensional memory device and method of erasing thereof from a source side
Q123254491Three-dimensional memory device containing III-V compound semiconductor channel and contacts and method of making the same
Q123255114Three-dimensional memory device containing III-V compound semiconductor channel and contacts and method of making the same
Q123255526Three-dimensional memory device containing III-V compound semiconductor channel and contacts and method of making the same
Q123255826Three-dimensional memory device containing a channel connection strap and method for making the same
Q123255647Three-dimensional memory device containing a dummy memory film isolation structure and method of making thereof
Q123254631Three-dimensional memory device containing a shared word line driver across different tiers and methods for making the same
Q123255364Three-dimensional memory device containing a shared word line driver across different tiers and methods for making the same
Q123255851Three-dimensional memory device containing aluminum-silicon word lines and methods of manufacturing the same
Q123255515Three-dimensional memory device containing amorphous and crystalline blocking dielectric layers
Q123254985Three-dimensional memory device containing auxiliary support pillar structures and method of making the same
Q123254818Three-dimensional memory device containing bridges for enhanced structural support and methods of forming the same
Q123255733Three-dimensional memory device containing compositionally graded word line diffusion barrier layer for and methods of forming the same
Q123255691Three-dimensional memory device containing epitaxial ferroelectric memory elements and methods for forming the same
Q123255400Three-dimensional memory device containing ferroelectric memory elements encapsulated by transition metal-containing conductive elements and method of
Q123255882Three-dimensional memory device containing horizontal and vertical word line interconnections and methods of forming the same
Q123255907Three-dimensional memory device containing horizontal and vertical word line interconnections and methods of forming the same
Q123255715Three-dimensional memory device containing inter-select-gate electrodes and methods of making the same
Q123254427Three-dimensional memory device containing low resistance source-level contact and method of making thereof
Q123255073Three-dimensional memory device containing metal-organic framework inter-word line insulating layers
Q123255658Three-dimensional memory device containing multiple size drain contact via structures and method of making same
Q123255071Three-dimensional memory device containing oxidation-resistant contact structures and methods of making the same
Q123255777Three-dimensional memory device containing structures for enhancing gate-induced drain leakage current and methods of forming the same
Q123254863Three-dimensional memory device containing word lines formed by selective tungsten growth on nucleation controlling surfaces and methods of manufactur
Q123254651Three-dimensional memory device employing thinned insulating layers and methods for forming the same
Q123254997Three-dimensional memory device employing thinned insulating layers and methods for forming the same
Q123254893Three-dimensional memory device having an epitaxial vertical semiconductor channel and method for making the same
Q123254898Three-dimensional memory device having an epitaxial vertical semiconductor channel and method for making the same
Q123255695Three-dimensional memory device having an epitaxial vertical semiconductor channel and method for making the same
Q123255902Three-dimensional memory device having support-die-assisted source power distribution and method of making thereof
Q123255477Three-dimensional memory device including III-V compound semiconductor channel layer and method of making the same
Q123255474Three-dimensional memory device including a composite semiconductor channel and a horizontal source contact layer and method of making the same
Q123255362Three-dimensional memory device including a silicon-germanium source contact layer and method of making the same
Q123255500Three-dimensional memory device including an inter-tier etch stop layer and method of making the same
Q123255108Three-dimensional memory device including backside trench support structures and methods of forming the same
Q123255166Three-dimensional memory device including bump-containing bit lines and methods for manufacturing the same
Q123255670Three-dimensional memory device including composite word lines and multi-strip select lines and method for making the same
Q123254930Three-dimensional memory device including contact via structures for multi-level stepped surfaces and methods for forming the same
Q123254796Three-dimensional memory device including discrete charge storage elements and methods of forming the same
Q123255076Three-dimensional memory device including discrete charge storage elements and methods of forming the same
Q123255471Three-dimensional memory device including ferroelectric-metal-insulator memory cells and methods of making the same
Q123255538Three-dimensional memory device including ferroelectric-metal-insulator memory cells and methods of making the same
Q123254457Three-dimensional memory device including laterally-undulating memory material layers and methods for forming the same
Q123255156Three-dimensional memory device including locally thickened electrically conductive layers and methods of manufacturing the same
Q123254741Three-dimensional memory device including metal silicide source regions and methods for forming the same
Q123255675Three-dimensional memory device including molybdenum word lines and metal oxide spacers and method of making the same
Q123254743Three-dimensional memory device including multi-bit charge storage elements and methods for forming the same
Q123254943Three-dimensional memory device including multi-tier moat isolation structures and methods of making the same
Q123254640Three-dimensional memory device including stairless word line contact structures for and method of making the same
Q123254825Three-dimensional memory device including stairless word line contact structures for and method of making the same
Q123254462Three-dimensional memory device including through-memory-level via structures and methods of making the same
Q123255000Three-dimensional memory device including through-memory-level via structures and methods of making the same
Q123255815Three-dimensional memory device including wrap around word lines and methods of forming the same
Q123255861Three-dimensional memory device with a dielectric isolation spacer and methods of forming the same
Q123254777Three-dimensional memory device with a graphene channel and methods of making the same
Q123255375Three-dimensional memory device with dielectric wall support structures and method of forming the same
Q123254637Three-dimensional memory device with high mobility channels and nickel aluminum silicide or germanide drain contacts and method of making the same
Q123255717Three-dimensional memory device with logic signal routing through a memory die and methods of making the same
Q123255060Three-dimensional memory device with separated source-side lines and method of making the same
Q123255082Three-dimensional memory device with variable width contact via structures and methods for making the same
Q123255492Three-dimensional memory device with vertical field effect transistors and method of making thereof
Q123255555Three-dimensional memory device with via structures surrounded by perforated dielectric moat structure and methods of making the same
Q123255512Three-dimensional memory die containing stress-compensating slit trench structures and methods for making the same
Q123254702Three-valued programming mechanism for non-volatile memory structures
Q123255205Threshold voltage setting with boosting read scheme
Q123255125Through-stack contact via structures for a three-dimensional memory device and methods of forming the same
Q123255160Through-stack contact via structures for a three-dimensional memory device and methods of forming the same
Q123255216Through-stack contact via structures for a three-dimensional memory device and methods of forming the same
Q123255117Time division peak power management for non-volatile storage
Q123255169Triggering next state verify in progam loop for nonvolatile memory
Q123254432Triggering next state verify in program loop for nonvolatile memory
Q123254484Two way single VREF trim for fully differential CDAC for accurate temperature sensing
Q123254921Two-stage programming using variable step voltage (DVPGM) for non-volatile memory structures
Q123255040Vector matrix multiplication with 3D NAND
Q123255034Vertical mapping and computing for deep neural networks in non-volatile memory
Q123255037Vertical mapping and computing for deep neural networks in non-volatile memory
Q123255820Word line architecture for three dimensional NAND flash memory
Q123255469Word line discharge skip for faster read time

manufacturer (P176)
Q5612372Gruvi
Q7418955Sansa Fuze
Q7418956Sansa Fuze+
Q7418957Sansa c200 Series
Q16255049Sansa e200 series
Q56297229quad-level cell

developer (P178)
Q466977SD card
Q12069280slotRadio

has part(s) (P527)
Q4045907Open NAND Flash Interface Working Group
Q50985990SD-3C LLC

Q88009994C L GanemployerP108
Q7389502SD Associationfounded byP112
Q738770Western Digitalowner ofP1830
Q20930782Category:SanDiskcategory's main topicP301
Q738770Western Digitalhas subsidiaryP355
Q1475349Fusion-iomerged intoP7888

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